Faculty

Institution

Unit

Venue

John Chandy

Professor and Department Head

University of Connecticut

Affiliations

College of Engineering

School of Computing

John Chandy is currently serving as a College Of Engineering Professor and Department Head at University of Connecticut.

Honors

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Experiences

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Education

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John Chandy

University of Connecticut

Professor and Department Head

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electrical engineering systems engineering optoelectronics computer science electronics power electronics microelectronics semiconductors engineering quantum dots nanoelectronics solid-state electronics semiconductor devices information security semiconductor technology computer security hardware security electronic materials printed electronics emerging memory technologies organic electronics vlsi design intermittently connected device spatial wavefunction communication security vlsi technology spatial wave-function processor architectures power semiconductor devices semiconductor device fabrication analog design high-frequency devices quantum dot channel computer-aided design data security reliability engineering high performance computer architecture distributed systems parallel programming asic implementation physical unclonable function digital circuit design parallel storage quantum technologies fpga design device modeling ii-vi gate insulators field-effect transistors network intrusion detection oscillator puf design storage system network processing applications active storage networks electronic packaging microelectronics reliability microwave technology microarchitecture chip on board hardware architecture reverse engineering system on chip vlsi architecture physical security electronic design circuit design electronic engineering network security device reliability time delay systems model framework unclonable functions system-level security system level security nonvolatile memories dram remanence effects puf-based fuzzy authentication scalability distributed processing distributed computing computer engineering parallel computing cluster computing

Notable Scholarly Works

Notable Federal Grants

Collaborators

8-State Srams Based on Cladded Ge Quantum Dot Gate Fets. Selected topics in electornics and systems (2024)

B. SamanA. AlmalkiJ. ChandyE. HellerF. C. Jain

systems engineeringelectronicssemiconductor devicesquantum dotssemiconductors

Design and Simulation of 4-State Srams Using 4-State Quantum Dot Gate (Qdg) Fets. Selected topics in electornics and systems (2024)

B. KhanB. SamanA. AlmalkiR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

systems engineeringquantum dots

In-Memory Computing Using Dot-Product via Multi-Bit Qd-Nvrams. Selected topics in electornics and systems (2024)

R. H. GudlavalletiJ. ChandyE. HellerF. Jain

multi-bit qd-nvramssystems engineeringin-memory computing

Si/Ge Quantum Dot Channel Fets for Multi-Bit Computing. Selected topics in electornics and systems (2024)

F. JainR. H. GudlavalletiJ. ChandyE. Heller

solid-state electronicselectronicsmulti-bit computingsemiconductor devicessemiconductor nanostructuresoptoelectronicssemiconductor technologyelectrical engineeringpower electronicsquantum dotssemiconductorsmicroelectronicsnanoelectronics

Simulation and Comparative Study of Propagation Delay in Multi-Channel Quantum Sws-Cmos-Based Inverters Using II–VI Gate Insulator. Selected topics in electornics and systems (2024)

A. AlmalkiB. SamanR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

electrical engineeringpropagation delayii-vi gate insulator

Threshold Inverter Quantizer-Based 2-Bit Comparator Using Spatial Wavefunction Switched (Sws) Fet Inverters: Power Dissipation Analysis. Selected topics in electornics and systems (2024)

W. AlamoudiB. SamanR. H. GudlavalletiA. AlmalkiJ. ChandyE. HellerF. Jain

systems engineeringspatial wavefunctionelectrical engineeringpower dissipation analysispower electronicsfet inverters

Compute-In-Memory Sram Cell Using Multistate Spatial Wavefunction Switched (Sws)-Quantum Dot Channel (Qdc) Fet. Selected topics in electornics and systems (2023)

Raja Hari GudlavalletiEvan HellerJohn ChandyFaquir Jain

compute-in-memory sram cellelectronicssemiconductor devicesmultistate spatial wavefunctionnanotechnologyoptoelectronicsbioelectronicselectrical engineeringsemiconductorsnanoelectronics

Design and Simulation of Multi-State D-Latch Circuit Using Qdc-Sws Fets. Selected topics in electornics and systems (2023)

A. AlmalkiB. SamanR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

optoelectronicselectrical engineeringpower electronicsmulti-state d-latch circuitapplied physicsqdc-sws fets

Enhancing Number of Bits via Mini-Energy Band Transitions Using Si Quantum Dot Channel (Qdc) and Ge Quantum Dot Gate (Qdg) Fets and Nvrams. Selected topics in electornics and systems (2023)

F. JainR. H. GudlavalletiA. AlmalkiB. SamanP-Y. ChanJ. ChandyF. PapadimitrakopoulosE. Heller

systems engineeringsolid-state electronicselectronicsquantum technologiessemiconductor devicesmini-energy band transitionsoptoelectronicssemiconductor technologyelectronic materialselectrical engineeringpower electronicssemiconductorsphotovoltaicsmicroelectronicsnanoelectronicsmaterials science

Novel Multi-State Qdc-Qdg Fets and Gate All Around (Gaa) Fets for Integrated Logic and Qd-Nvrams. Selected topics in electornics and systems (2023)

F. JainR. H. GudlavalletiJ. ChandyE. Heller

solid-state electronicselectronicsintermittently connected devicesemiconductor devicesoptoelectronicspower semiconductor devicessemiconductor technologyelectrical engineeringpower electronicssemiconductorsmicroelectronicsnanoelectronics

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John Chandy

Professor and Department Head

University of Connecticut

Affiliations

College of Engineering

School of Computing

John Chandy is currently serving as a College Of Engineering Professor and Department Head at University of Connecticut.

Honors

Create free account to unlock more features

Experiences

Create free account to unlock more features

Education

Create free account to unlock more features

John Chandy

University of Connecticut

Professor and Department Head

You can click a keyword to filter the displayed items

Notable Scholarly Works

Notable Federal Grants

Collaborators

8-State Srams Based on Cladded Ge Quantum Dot Gate Fets. Selected topics in electornics and systems (2024)

B. SamanA. AlmalkiJ. ChandyE. HellerF. C. Jain

systems engineeringelectronicssemiconductor devicesquantum dotssemiconductors

Design and Simulation of 4-State Srams Using 4-State Quantum Dot Gate (Qdg) Fets. Selected topics in electornics and systems (2024)

B. KhanB. SamanA. AlmalkiR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

systems engineeringquantum dots

In-Memory Computing Using Dot-Product via Multi-Bit Qd-Nvrams. Selected topics in electornics and systems (2024)

R. H. GudlavalletiJ. ChandyE. HellerF. Jain

multi-bit qd-nvramssystems engineeringin-memory computing

Si/Ge Quantum Dot Channel Fets for Multi-Bit Computing. Selected topics in electornics and systems (2024)

F. JainR. H. GudlavalletiJ. ChandyE. Heller

Simulation and Comparative Study of Propagation Delay in Multi-Channel Quantum Sws-Cmos-Based Inverters Using II–VI Gate Insulator. Selected topics in electornics and systems (2024)

A. AlmalkiB. SamanR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

electrical engineeringpropagation delayii-vi gate insulator

Threshold Inverter Quantizer-Based 2-Bit Comparator Using Spatial Wavefunction Switched (Sws) Fet Inverters: Power Dissipation Analysis. Selected topics in electornics and systems (2024)

W. AlamoudiB. SamanR. H. GudlavalletiA. AlmalkiJ. ChandyE. HellerF. Jain

systems engineeringspatial wavefunctionelectrical engineeringpower dissipation analysispower electronicsfet inverters

Compute-In-Memory Sram Cell Using Multistate Spatial Wavefunction Switched (Sws)-Quantum Dot Channel (Qdc) Fet. Selected topics in electornics and systems (2023)

Raja Hari GudlavalletiEvan HellerJohn ChandyFaquir Jain

compute-in-memory sram cellelectronicssemiconductor devicesmultistate spatial wavefunctionnanotechnologyoptoelectronicsbioelectronicselectrical engineeringsemiconductorsnanoelectronics

Design and Simulation of Multi-State D-Latch Circuit Using Qdc-Sws Fets. Selected topics in electornics and systems (2023)

A. AlmalkiB. SamanR. H. GudlavalletiJ. ChandyE. HellerF. C. Jain

optoelectronicselectrical engineeringpower electronicsmulti-state d-latch circuitapplied physicsqdc-sws fets

Enhancing Number of Bits via Mini-Energy Band Transitions Using Si Quantum Dot Channel (Qdc) and Ge Quantum Dot Gate (Qdg) Fets and Nvrams. Selected topics in electornics and systems (2023)

F. JainR. H. GudlavalletiA. AlmalkiB. SamanP-Y. ChanJ. ChandyF. PapadimitrakopoulosE. Heller

Novel Multi-State Qdc-Qdg Fets and Gate All Around (Gaa) Fets for Integrated Logic and Qd-Nvrams. Selected topics in electornics and systems (2023)

F. JainR. H. GudlavalletiJ. ChandyE. Heller

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